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Features
* * * * * * * *
User-Controlled Power Down Pin High-Speed Equivalent of ATF20V8B Pin-Controlled Zero Standby Power (10 A Typical) Option Industry Standard Architecture - Emulates Many 24-Pin PALs(R) - Low-Cost Easy-to-Use Software Tools High-Speed Electrically-Erasable Programmable Logic Devices - 5 ns Maximum Pin-to-Pin Delay CMOS and TTL Compatible Inputs and Outputs - Latch Feature Hold Outputs to Previous Logic States Advanced Flash Technology - Reprogrammable - 100% Tested High-Reliability CMOS Process - 20 Year Data Retention - 100 Erase/Write Cycles - 2,000V ESD Protection - 200 mA Latchup Immunity Commercial, and Industrial Temperature Ranges Dual-in-Line and Surface Mount Packages in Standard Pinouts PCI Compliant
HighPerformance EE PLD ATF20V8C Advance Information
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Block Diagram
Pin Configurations
Pin Name CLK IN I/O OE * VCC PD Function Clock Logic Inputs Bidirectional Buffers Output Enable No Internal Connection +5V Supply Power Down DIP
CLK/IN IN IN PD/IN IN IN IN IN IN IN IN GND 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 VCC IN I/O I/O I/O I/O I/O I/O I/O I/O IN OE/IN
TSSOP Top View
CLK/IN IN IN PD/ IN IN IN IN IN IN IN IN GND 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 VCC IN I/O I/O I/O I/O I/O I/O I/O I/O IN OE/IN
PLCC Top View
IN IN CLK/IN * VCC IN I/O 4 3 2 1 28 27 26 12 13 14 15 16 17 18 PD/IN IN IN * IN IN IN 5 6 7 8 9 10 11 25 24 23 22 21 20 19 I/O I/O I/O * I/O I/O I/O
IN IN GND * OE/IN IN I/O
Rev. 0408D-01/99
1
Description
The ATF20V8C is a high performance CMOS (Electrically Erasable) Programmable Logic Devices (PLDs) which utilize Atmel's proven electrically erasable Flash memory technology. Speeds down to 5 ns and power dissipation as low as 10 A are offered. All speed ranges are specified over the full 5V 10% range for industrial temperature ranges, and 5V 5% for commercial ranges. The ATF20V8C provides a high-speed CMOS PLD solution with maximum pin to pin delay of 5 ns. The ATF20V8C also has a user-controlled power down feature, offering "zero" standby power (10 A typical). The user-controlled power down feature allows the user to manage total system power to meet specific application requirements, enhance reliability all without sacrificing speed. Pin "keeper" circuits on input and output pin reduce static power consumed by pullup resistors. The ATF20V8C incorporates a superset of the generic architectures, which allows direct replacement of the 20R8 family and most 24-pin combinatorial PLDs. Eight outputs are each allocated eight product terms. Three different modes of operation, configured automatically with software, allowing highly complex logic functions to be realized.
DC and AC Operating Conditions
Commercial Operating Temperature (Ambient) VCC Power Supply 0C - 70C 5V 5% Industrial -40C - 85C 5V 10%
Functional Description
The ATF20V8C macrocell can be configured in one of three different modes. Each mode makes the ATF20V8C look like a different device. The ATF20V8C can be a registered output, combinatorial I/O, combinatorial output, or dedicated input. Most PLD compilers can choose the right mode automatically. The user can also force the selection by supplying the compiler with a mode selection. The determining factors would be the usage of register versus combinatorial outputs and dedicated outputs versus output with output enable control. The ATF20V8C has a user controlled power down pin which, when active, allows the user to place the device into a "zero" standby power down mode. The device can also operate at high speed. Maximum pin-to-pin delays of 5 ns are offered. Static power loss due to pull-up resistors is eliminated by using input and output pin "keeper" circuits which holds pins to their previous logic levels when idle. The universal architecture of the ATF20V8C can be programmed to emulate many 24-pin PAL devices. The user can download the subset device JEDEC programming file to the PLD programmer, and the ATF20V8C can be configured to act like the chosen device. Unused product terms are automatically disabled by the compiler to decrease power consumption. A Security Fuse, when programmed, protects the contents the ATF20V8C. Eight bytes (64 fuses) of User Signature are accessible to the user for purposes such as storing project name, part number, revision or date. The User Signature is accessible regardless of the state of the Security Fuse.
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ATF20V8C
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(c) Atmel Corporation 1998. Atmel Cor poration makes no warranty for the use of its products, other than those expressly contained in the Company's standard warranty which is detailed in Atmel's Terms and Conditions located on the Company's web site. The Company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein. No licenses to patents or other intellectual proper ty of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel's products are not authorized for use as critical components in life suppor t devices or systems. Marks bearing
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0408D-01/99/xM
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